Demand for low-cost, light-weight, mechanically strong, high-efficiency multi-junction solar cells has motivated the development and use of high-quality germanium-on-silicon (GoS) heterostructures to integrate III-V films. However, such integration poses many engineering challenges, ranging from lattice mismatch, to thermal expansion coefficient mismatch, and to non-planar morphological evolution.
The latter challenge, in particular, requires a stringent planarization of the GoS surface to have a low root-mean-square (RMS) roughness. The low surface roughness is desirable for the subsequent growth of Group III-V materials including GaAs in order to maintain, for example, the crystallographic tilt angle of off-cut wafers over the entire surface. The vicinal surface then helps eliminate antiphase domain boundaries in the formed GaAs layer.
Conventional methods to reduce surface roughness of semiconductor materials include a slurry-based chemical mechanical planarization (CMP). Particles (e.g., silica particles) are often used in conventional slurry-based CMP solutions and often leave scratches on Ge-based surfaces after the planarization. In addition, following the slurry-based CMP process, conventional arsine (AsH3) exposure prior to the GaAs growth further roughens the Ge-based surfaces. Consequently, the GaAs growth on the roughened Ge-based surface results in a rough GaAs surface having RMS roughness of greater than 30 nm.
Thus, there is a need to overcome these and other problems of the prior art and to provide methods for planarizing semiconductor surfaces with a low surface roughness.